Symbol: mmVM_L2_CNTL2_BASE_IDX
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
1168
#define mmVM_L2_CNTL2_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
1194
#define mmVM_L2_CNTL2_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
1132
#define mmVM_L2_CNTL2_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h
1290
#define mmVM_L2_CNTL2_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h
1299
#define mmVM_L2_CNTL2_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h
1283
#define mmVM_L2_CNTL2_BASE_IDX 0