sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

1209

#define mmVM_L2_CNTL4 0x0857

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

1235

#define mmVM_L2_CNTL4 0x0857

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

1173

#define mmVM_L2_CNTL4 0x0857

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h

655

#define mmVM_L2_CNTL4 0x578

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h

657

#define mmVM_L2_CNTL4 0x578

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h

1331

#define mmVM_L2_CNTL4 0x0697

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h

1340

#define mmVM_L2_CNTL4 0x0697

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h

1324

#define mmVM_L2_CNTL4 0x0697