sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

1167

#define mmVM_L2_CNTL2 0x0841

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

1193

#define mmVM_L2_CNTL2 0x0841

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

1131

#define mmVM_L2_CNTL2 0x0841

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h

1258

#define mmVM_L2_CNTL2 0x0501

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_7_0_d.h

542

#define mmVM_L2_CNTL2 0x501

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h

575

#define mmVM_L2_CNTL2 0x501

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h

598

#define mmVM_L2_CNTL2 0x501

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h

600

#define mmVM_L2_CNTL2 0x501

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h

1289

#define mmVM_L2_CNTL2 0x0681

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h

1298

#define mmVM_L2_CNTL2 0x0681

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h

1282

#define mmVM_L2_CNTL2 0x0681