sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

1165

#define mmVM_L2_CNTL 0x0840

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

1191

#define mmVM_L2_CNTL 0x0840

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

1129

#define mmVM_L2_CNTL 0x0840

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h

1257

#define mmVM_L2_CNTL 0x0500

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_7_0_d.h

541

#define mmVM_L2_CNTL 0x500

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h

574

#define mmVM_L2_CNTL 0x500

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h

597

#define mmVM_L2_CNTL 0x500

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h

599

#define mmVM_L2_CNTL 0x500

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h

1287

#define mmVM_L2_CNTL 0x0680

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h

1296

#define mmVM_L2_CNTL 0x0680

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h

1280

#define mmVM_L2_CNTL 0x0680