sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

1752

#define mmTCC_CTRL 0x0b80

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

2037

#define mmTCC_CTRL 0x0b80

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

1977

#define mmTCC_CTRL 0x0b80

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

1600

#define mmTCC_CTRL 0x2B80

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2020

#define mmTCC_CTRL 0x2b80

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2041

#define mmTCC_CTRL 0x2b80

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2245

#define mmTCC_CTRL 0x2b80

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2224

#define mmTCC_CTRL 0x2b80