Symbol: mmPA_SC_MODE_CNTL_1_BASE_IDX
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
6486
#define mmPA_SC_MODE_CNTL_1_BASE_IDX 1
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
6115
#define mmPA_SC_MODE_CNTL_1_BASE_IDX 1
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
4092
#define mmPA_SC_MODE_CNTL_1_BASE_IDX 1
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
4322
#define mmPA_SC_MODE_CNTL_1_BASE_IDX 1
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
4276
#define mmPA_SC_MODE_CNTL_1_BASE_IDX 1