sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

1698

#define mmMC_VM_MX_L1_TLB_CNTL 0x0987

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

1717

#define mmMC_VM_MX_L1_TLB_CNTL 0x0987

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

1659

#define mmMC_VM_MX_L1_TLB_CNTL 0x0987

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h

1051

#define mmMC_VM_MX_L1_TLB_CNTL 0x0819

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_7_0_d.h

257

#define mmMC_VM_MX_L1_TLB_CNTL 0x819

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h

288

#define mmMC_VM_MX_L1_TLB_CNTL 0x819

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_8_1_d.h

297

#define mmMC_VM_MX_L1_TLB_CNTL 0x819

sys/dev/pci/drm/amd/include/asic_reg/gmc/gmc_8_2_d.h

294

#define mmMC_VM_MX_L1_TLB_CNTL 0x819

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h

1969

#define mmMC_VM_MX_L1_TLB_CNTL 0x0833

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_1_offset.h

1978

#define mmMC_VM_MX_L1_TLB_CNTL 0x0833

sys/dev/pci/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h

1970

#define mmMC_VM_MX_L1_TLB_CNTL 0x0833