sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5603

#define mmGDS_VMID15_BASE 0x20be

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

5228

#define mmGDS_VMID15_BASE 0x20be

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

3103

#define mmGDS_VMID15_BASE 0x131e

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3333

#define mmGDS_VMID15_BASE 0x131e

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3283

#define mmGDS_VMID15_BASE 0x131e

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2232

#define mmGDS_VMID15_BASE 0x331e

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2254

#define mmGDS_VMID15_BASE 0x331e

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2452

#define mmGDS_VMID15_BASE 0x331e

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2431

#define mmGDS_VMID15_BASE 0x331e