sys/dev/pci/drm/amd/include/asic_reg/dce/dce_10_0_d.h

1652

#define mmDC_GPIO_DDCVGA_EN 0x4882

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_11_0_d.h

1482

#define mmDC_GPIO_DDCVGA_EN 0x4882

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_11_2_d.h

1581

#define mmDC_GPIO_DDCVGA_EN 0x4882

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_12_0_offset.h

2020

#define mmDC_GPIO_DDCVGA_EN 0x2100

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_6_0_d.h

1242

#define mmDC_GPIO_DDCVGA_EN 0x1972

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_8_0_d.h

1361

#define mmDC_GPIO_DDCVGA_EN 0x1972

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h

10547

#define mmDC_GPIO_DDCVGA_EN 0x28ea

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h

12862

#define mmDC_GPIO_DDCVGA_EN 0x28ea

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h

11433

#define mmDC_GPIO_DDCVGA_EN 0x28ea

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h

12695

#define mmDC_GPIO_DDCVGA_EN 0x28ea

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_0_1_offset.h

9216

#define mmDC_GPIO_DDCVGA_EN 0x28ea

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h

11531

#define mmDC_GPIO_DDCVGA_EN 0x28ea

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h

5535

#define mmDC_GPIO_DDCVGA_EN 0x28ea