sys/dev/pci/drm/amd/include/asic_reg/dce/dce_10_0_d.h

7185

#define mmDC_I2C_DDCVGA_SETUP 0x16f1

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_11_0_d.h

7375

#define mmDC_I2C_DDCVGA_SETUP 0x16f1

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_11_2_d.h

8767

#define mmDC_I2C_DDCVGA_SETUP 0x16f1

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_12_0_offset.h

1694

#define mmDC_I2C_DDCVGA_SETUP 0x15a1

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_6_0_d.h

1333

#define mmDC_I2C_DDCVGA_SETUP 0x1857

sys/dev/pci/drm/amd/include/asic_reg/dce/dce_8_0_d.h

3592

#define mmDC_I2C_DDCVGA_SETUP 0x1857

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h

7725

#define mmDC_I2C_DDCVGA_SETUP 0x1eb5

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h

10346

#define mmDC_I2C_DDCVGA_SETUP 0x1eb5