Symbol: mmCP_HQD_GFX_CONTROL_BASE_IDX
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
5060
#define mmCP_HQD_GFX_CONTROL_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
4717
#define mmCP_HQD_GFX_CONTROL_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2806
#define mmCP_HQD_GFX_CONTROL_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
3034
#define mmCP_HQD_GFX_CONTROL_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
2990
#define mmCP_HQD_GFX_CONTROL_BASE_IDX 0