Symbol: mmCP_HQD_HQ_STATUS1_BASE_IDX
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
5378
#define mmCP_HQD_HQ_STATUS1_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
5011
#define mmCP_HQD_HQ_STATUS1_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
2894
#define mmCP_HQD_HQ_STATUS1_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
3122
#define mmCP_HQD_HQ_STATUS1_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
3078
#define mmCP_HQD_HQ_STATUS1_BASE_IDX 0