sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5303

#define mmCP_MQD_BASE_ADDR 0x1fa9

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4936

#define mmCP_MQD_BASE_ADDR 0x1fa9

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2819

#define mmCP_MQD_BASE_ADDR 0x1245

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3047

#define mmCP_MQD_BASE_ADDR 0x1245

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3003

#define mmCP_MQD_BASE_ADDR 0x1245

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

567

#define mmCP_MQD_BASE_ADDR 0x3245

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

580

#define mmCP_MQD_BASE_ADDR 0x3245

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

630

#define mmCP_MQD_BASE_ADDR 0x3245

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

630

#define mmCP_MQD_BASE_ADDR 0x3245