sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

5319

#define mmCP_HQD_PQ_BASE 0x1fb1

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

4952

#define mmCP_HQD_PQ_BASE 0x1fb1

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

2835

#define mmCP_HQD_PQ_BASE 0x124d

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

3063

#define mmCP_HQD_PQ_BASE 0x124d

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

3019

#define mmCP_HQD_PQ_BASE 0x124d

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

575

#define mmCP_HQD_PQ_BASE 0x324d

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

588

#define mmCP_HQD_PQ_BASE 0x324d

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

638

#define mmCP_HQD_PQ_BASE 0x324d

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

638

#define mmCP_HQD_PQ_BASE 0x324d