Symbol: mmCP_DDID_CNTL_BASE_IDX
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h
4986
#define mmCP_DDID_CNTL_BASE_IDX 0
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
4643
#define mmCP_DDID_CNTL_BASE_IDX 0