sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

10163

#define mmCGTT_SX_CLK_CTRL0 0x5094

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

9865

#define mmCGTT_SX_CLK_CTRL0 0x5094

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

6537

#define mmCGTT_SX_CLK_CTRL0 0x5094

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

6759

#define mmCGTT_SX_CLK_CTRL0 0x5094

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

6779

#define mmCGTT_SX_CLK_CTRL0 0x5094

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

312

#define mmCGTT_SX_CLK_CTRL0 0x240C

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

1996

#define mmCGTT_SX_CLK_CTRL0 0xf094

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2017

#define mmCGTT_SX_CLK_CTRL0 0xf094

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2221

#define mmCGTT_SX_CLK_CTRL0 0xf094

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2189

#define mmCGTT_SX_CLK_CTRL0 0xf094