sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

10181

#define mmCGTT_GDS_CLK_CTRL 0x50a0

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

9881

#define mmCGTT_GDS_CLK_CTRL 0x50a0

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

6555

#define mmCGTT_GDS_CLK_CTRL 0x50a0

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

6777

#define mmCGTT_GDS_CLK_CTRL 0x50a0

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

6797

#define mmCGTT_GDS_CLK_CTRL 0x50a0

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_6_0_d.h

303

#define mmCGTT_GDS_CLK_CTRL 0x25DD

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

2163

#define mmCGTT_GDS_CLK_CTRL 0xf0a0

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

2184

#define mmCGTT_GDS_CLK_CTRL 0xf0a0

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

2382

#define mmCGTT_GDS_CLK_CTRL 0xf0a0

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

2361

#define mmCGTT_GDS_CLK_CTRL 0xf0a0