sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

10197

#define mmCGTT_CPC_CLK_CTRL 0x50b2

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

9897

#define mmCGTT_CPC_CLK_CTRL 0x50b2

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

6569

#define mmCGTT_CPC_CLK_CTRL 0x50b2

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

6791

#define mmCGTT_CPC_CLK_CTRL 0x50b2

sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

6811

#define mmCGTT_CPC_CLK_CTRL 0x50b2

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_0_d.h

245

#define mmCGTT_CPC_CLK_CTRL 0xf0b2

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_2_d.h

247

#define mmCGTT_CPC_CLK_CTRL 0xf0b2

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

276

#define mmCGTT_CPC_CLK_CTRL 0xf0b2

sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_d.h

277

#define mmCGTT_CPC_CLK_CTRL 0xf0b2