Symbol: mmCGTS_CU0_SP1_CTRL_REG
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
6319
#define mmCGTS_CU0_SP1_CTRL_REG 0x500b
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_offset.h
6541
#define mmCGTS_CU0_SP1_CTRL_REG 0x500b
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h
6553
#define mmCGTS_CU0_SP1_CTRL_REG 0x500b
sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_0_d.h
1488
#define mmCGTS_CU0_SP1_CTRL_REG 0xf00b
sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_7_2_d.h
1509
#define mmCGTS_CU0_SP1_CTRL_REG 0xf00b
sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_d.h
1702
#define mmCGTS_CU0_SP1_CTRL_REG 0xf00b
sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_d.h
1670
#define mmCGTS_CU0_SP1_CTRL_REG 0xf00b