sys/dev/pci/drm/amd/include/asic_reg/dce/dce_12_0_offset.h

1474

#define mmAZALIA_SOCCLK_CONTROL 0x04bf

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h

1796

#define mmAZALIA_SOCCLK_CONTROL 0x03c5

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h

1440

#define mmAZALIA_SOCCLK_CONTROL 0x03c5

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_2_0_1_offset.h

207

#define mmAZALIA_SOCCLK_CONTROL 0x03c5

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h

1402

#define mmAZALIA_SOCCLK_CONTROL 0x03c5

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h

1346

#define mmAZALIA_SOCCLK_CONTROL 0x03c5

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_0_1_offset.h

1356

#define mmAZALIA_SOCCLK_CONTROL 0x03c5

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h

1328

#define mmAZALIA_SOCCLK_CONTROL 0x03c5

sys/dev/pci/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h

1155

#define mmAZALIA_SOCCLK_CONTROL 0x03c5