sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h

1238

#define UVD_JMI_CNTL__SOFT_RESET_MASK 0x00000001L

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h

1241

#define UVD_JMI_CNTL__SOFT_RESET_MASK 0x00000001L

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_2_6_0_sh_mask.h

1974

#define UVD_JMI_CNTL__SOFT_RESET_MASK 0x00000001L

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h

1589

#define UVD_JMI_CNTL__SOFT_RESET_MASK 0x00000001L

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_0_sh_mask.h

5852

#define UVD_JMI_CNTL__SOFT_RESET_MASK 0x00000001L

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_3_sh_mask.h

6210

#define UVD_JMI_CNTL__SOFT_RESET_MASK 0x00000001L

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h

5673

#define UVD_JMI_CNTL__SOFT_RESET_MASK 0x00000001L

sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h

5012

#define UVD_JMI_CNTL__SOFT_RESET_MASK 0x00000001L