Symbol: UVD_IPX_DLDO_STATUS__ONO0_PWR_STATUS__SHIFT
sys/dev/pci/drm/amd/amdgpu/umsch_mm_v4_0.c
45
#define UVD_IPX_DLDO_STATUS__ONO0_PWR_STATUS__SHIFT 0x00000001
sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_4_0_5_sh_mask.h
6539
#define UVD_IPX_DLDO_STATUS__ONO0_PWR_STATUS__SHIFT 0x1
sys/dev/pci/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h
5331
#define UVD_IPX_DLDO_STATUS__ONO0_PWR_STATUS__SHIFT 0x1