Symbol: THM_CLK_CNTL__TMON_CLK_SEL__SHIFT
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h
485
#define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x00000008
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h
266
#define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h
264
#define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h
262
#define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h
264
#define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h
264
#define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h
292
#define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8