Symbol: SEM_VF_ENABLE__VALUE_MASK
sys/dev/pci/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h
197
#define SEM_VF_ENABLE__VALUE_MASK 0x1
sys/dev/pci/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h
319
#define SEM_VF_ENABLE__VALUE_MASK 0x1