Symbol: RLC_GPU_IOV_VIRT_RESET_REQ__RESERVED__SHIFT
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h
39954
#define RLC_GPU_IOV_VIRT_RESET_REQ__RESERVED__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
27401
#define RLC_GPU_IOV_VIRT_RESET_REQ__RESERVED__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
28684
#define RLC_GPU_IOV_VIRT_RESET_REQ__RESERVED__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
29031
#define RLC_GPU_IOV_VIRT_RESET_REQ__RESERVED__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h
14601
#define RLC_GPU_IOV_VIRT_RESET_REQ__RESERVED__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h
30790
#define RLC_GPU_IOV_VIRT_RESET_REQ__RESERVED__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h
9520
#define RLC_GPU_IOV_VIRT_RESET_REQ__RESERVED__SHIFT 0x10