Symbol: RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
23278
#define RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h
24565
#define RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
24629
#define RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_4_2_sh_mask.h
22073
#define RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gc/gc_9_4_3_sh_mask.h
26890
#define RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h
8958
#define RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h
9500
#define RLC_SERDES_WR_CTRL__BPM_DATA__SHIFT 0x10