Symbol: PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT
sys/dev/pci/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h
2634
#define PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT 0x0
sys/dev/pci/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h
2648
#define PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT 0x0
sys/dev/pci/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h
2888
#define PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT 0x0
sys/dev/pci/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h
3984
#define PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT 0x0
sys/dev/pci/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h
8172
#define PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT 0x00000000
sys/dev/pci/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h
2692
#define PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT 0x0