Symbol: MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL__SHIFT
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h
274
#define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h
272
#define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h
270
#define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h
272
#define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h
272
#define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL__SHIFT 0x10
sys/dev/pci/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h
300
#define MISC_CLK_CTRL__DFT_SMS_PG_CLK_SEL__SHIFT 0x10