root/sys/arch/arc/arc/locore_machdep.S
/*      $NetBSD: locore_machdep.S,v 1.17 2019/04/07 03:53:53 rin Exp $  */
/*      $OpenBSD: locore.S,v 1.12 1997/04/19 17:19:43 pefo Exp $        */

/*
 * Copyright (c) 1992, 1993
 *      The Regents of the University of California.  All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * Digital Equipment Corporation and Ralph Campbell.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * Copyright (C) 1989 Digital Equipment Corporation.
 * Permission to use, copy, modify, and distribute this software and
 * its documentation for any purpose and without fee is hereby granted,
 * provided that the above copyright notice appears in all copies.
 * Digital Equipment Corporation makes no representations about the
 * suitability of this software for any purpose.  It is provided "as is"
 * without express or implied warranty.
 *
 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s,
 *      v 1.1 89/07/11 17:55:04 nelson Exp  SPRITE (DECWRL)
 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s,
 *      v 9.2 90/01/29 18:00:39 shirriff Exp  SPRITE (DECWRL)
 * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s,
 *      v 1.1 89/07/10 14:27:41 nelson Exp  SPRITE (DECWRL)
 *
 *      from: @(#)locore.s      8.5 (Berkeley) 1/4/94
 */

/*
 * ARC-specific mips locore code
 */

#include <mips/asm.h>
#include <mips/cpuregs.h>       /* XXX - misnomer? */
#include <machine/endian.h>

        .set    noreorder

/*
 * GCC2 seems to want to call __main in main() for some reason.
 */
LEAF(__main)
        j       ra
        nop
END(__main)


/*
 *      Block I/O routines mainly used by I/O drivers.
 *
 *      Args as:        a0 = port
 *                      a1 = memory address
 *                      a2 = count
 */
LEAF(insb)
        beq     a2, zero, 2f
        addu    a2, a1
1:
        lbu     v0, 0(a0)
        addiu   a1, 1
        bne     a1, a2, 1b
        sb      v0, -1(a1)
2:
        jr      ra
        nop
END(insb)

LEAF(insw)
        beq     a2, zero, 2f
        addu    a2, a2
        addu    a2, a1
1:
        lhu     v0, 0(a0)
        addiu   a1, 2
        bne     a1, a2, 1b
        sh      v0, -2(a1)
2:
        jr      ra
        nop
END(insw)

LEAF(insl)
        beq     a2, zero, 2f
        sll     a2, 2
        addu    a2, a1
1:
        lw      v0, 0(a0)
        addiu   a1, 4
        bne     a1, a2, 1b
        sw      v0, -4(a1)
2:
        jr      ra
        nop
END(insl)

LEAF(outsb)
        beq     a2, zero, 2f
        addu    a2, a1
1:
        lbu     v0, 0(a1)
        addiu   a1, 1
        bne     a1, a2, 1b
        sb      v0, 0(a0)
2:
        jr      ra
        nop
END(outsb)

LEAF(outsw)
        beq     a2, zero, 2f
        addu    a2, a2
        li      v0, 1
        and     v0, a1
        bne     v0, zero, 3f            # arghh, unaligned.
        addu    a2, a1
1:
        lhu     v0, 0(a1)
        addiu   a1, 2
        bne     a1, a2, 1b
        sh      v0, 0(a0)
2:
        jr      ra
        nop
3:
        LWHI    v0, 0(a1)
        LWLO    v0, 3(a1)
        addiu   a1, 2
        bne     a1, a2, 3b
        sh      v0, 0(a0)

        jr      ra
        nop
END(outsw)

LEAF(outsl)
        beq     a2, zero, 2f
        sll     a2, 2
        li      v0, 3
        and     v0, a1
        bne     v0, zero, 3f            # arghh, unaligned.
        addu    a2, a1
1:
        lw      v0, 0(a1)
        addiu   a1, 4
        bne     a1, a2, 1b
        sw      v0, 0(a0)
2:
        jr      ra
        nop
3:
        LWHI    v0, 0(a1)
        LWLO    v0, 3(a1)
        addiu   a1, 4
        bne     a1, a2, 3b
        sw      v0, 0(a0)

        jr      ra
        nop
END(outsl)

/*
 * fillw(pat, addr, count)
 */
LEAF(fillw)
1:
        addiu   a2, a2, -1
        sh      a0, 0(a1)
        bne     a2,zero, 1b
        addiu   a1, a1, 2

        jr      ra
        nop
END(fillw)