/*      $NetBSD: i386-asm.S,v 1.7 2019/05/21 05:29:21 mlelstv Exp $     */

/*-
 * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <machine/asm.h>
#include <machine/cputypes.h>
#include <machine/psl.h>

/* From sys/arch/x86/include/cpufunc.h */
#define OPTERON_MSR_PASSCODE    0x9c5a203aU

        .text

ENTRY(x86_cpuid2)
        pushl   %ebx
        pushl   %edi
        movl    12(%esp), %eax
        movl    16(%esp), %ecx
        movl    20(%esp), %edi
        cpuid
        movl    %eax, 0(%edi)
        movl    %ebx, 4(%edi)
        movl    %ecx, 8(%edi)
        movl    %edx, 12(%edi)
        popl    %edi
        popl    %ebx
        ret
END(x86_cpuid2)

ENTRY(x86_xgetbv)
        xorl    %ecx, %ecx
        xgetbv
        ret
END(x86_xgetbv)

ENTRY(x86_identify)
        /* Try to toggle alignment check flag; does not exist on 386. */
        pushfl
        popl    %eax
        movl    %eax,%ecx
        orl     $PSL_AC,%eax
        pushl   %eax
        popfl
        pushfl
        popl    %eax
        xorl    %ecx,%eax
        andl    $PSL_AC,%eax
        pushl   %ecx
        popfl
        testl   %eax,%eax
        jnz     try486

        /*
         * Try the test of a NexGen CPU -- ZF will not change on a DIV
         * instruction on a NexGen, it will on an i386.  Documented in
         * Nx586 Processor Recognition Application Note, NexGen, Inc.
         */
        movl    $0x5555,%eax
        xorl    %edx,%edx
        movl    $2,%ecx
        divl    %ecx
        jnz     is386

isnx586:
        /*
         * Don't try cpuid, as Nx586s reportedly don't support the
         * PSL_ID bit.
         */
        movl    $CPU_NX586,%eax
        ret
is386:
        movl    $CPU_386,%eax
        ret

try486: /* Try to toggle identification flag; does not exist on early 486s. */
        pushfl
        popl    %eax
        movl    %eax,%ecx
        xorl    $PSL_ID,%eax
        pushl   %eax
        popfl
        pushfl
        popl    %eax
        xorl    %ecx,%eax
        andl    $PSL_ID,%eax
        pushl   %ecx
        popfl

        testl   %eax,%eax
        jz      is486

        /* Later cpu, caller will use cpuid instruction */
        movl    $-1,%eax
        ret

is486:
        /*
         * Check Cyrix CPU
         * Cyrix CPUs do not change the undefined flags following
         * execution of the divide instruction which divides 5 by 2.
         *
         * Note: CPUID is enabled on M2, so it passes another way.
         */
        pushfl
        movl    $0x5555, %eax
        xorl    %edx, %edx
        movl    $2, %ecx
        clc
        divl    %ecx
        jnc     trycyrix486
        popfl
        movl    $CPU_486,%eax
        ret

trycyrix486:
        popfl
        /*
         * Check for Cyrix 486 CPU by seeing if the flags change during a
         * divide. This is documented in the Cx486SLC/e SMM Programmer's
         * Guide.
         */
        xorl    %edx,%edx
        cmpl    %edx,%edx               # set flags to known state
        pushl   %ebx
        pushfl
        popl    %ecx                    # store flags in ecx
        movl    $-1,%eax
        movl    $4,%ebx
        divl    %ebx                    # do a long division
        pushfl
        popl    %eax
        popl    %ebx
        xorl    %ecx,%eax               # are the flags different?
        testl   $0x8d5,%eax             # only check C|PF|AF|Z|N|V
        je      is486dlc                # yes => must be Cyrix 6x86 CPU
        movl    $CPU_6x86,%eax
        ret

is486dlc:
        movl    $CPU_486DLC,%eax
        ret