root/usr.sbin/cpuctl/arch/x86_64-asm.S
/*      $NetBSD: x86_64-asm.S,v 1.7 2019/05/21 05:29:21 mlelstv Exp $   */

/*-
 * Copyright (c) 2007 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <machine/asm.h>

/* From sys/arch/x86/include/cpufunc.h */
#define OPTERON_MSR_PASSCODE    0x9c5a203aU

        .text

ENTRY(x86_cpuid2)
        pushq   %rbx
        movq    %rdi, %rax
        movq    %rsi, %rcx
        movq    %rdx, %rsi
        cpuid
        movl    %eax, 0(%rsi)
        movl    %ebx, 4(%rsi)
        movl    %ecx, 8(%rsi)
        movl    %edx, 12(%rsi)
        popq    %rbx
        ret

ENTRY(x86_xgetbv)
        xorl    %ecx, %ecx
        xgetbv
        ret

ENTRY(x86_identify)
        movl    $-1,%eax
        ret