#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: tr2a.c,v 1.6 2015/06/23 21:00:23 matt Exp $");
#define __INTR_PRIVATE
#include "fb_sbdio.h"
#include "kbms_sbdio.h"
#include "zsc_sbdio.h"
#include "ewskbd_zsc.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/conf.h>
#include <sys/device.h>
#include <sys/cpu.h>
#include <uvm/uvm_extern.h>
#include <mips/locore.h>
#include <mips/cache.h>
#include <machine/autoconf.h>
#include <machine/sbdvar.h>
#define _SBD_TR2A_PRIVATE
#include <machine/sbd_tr2a.h>
#include <machine/z8530var.h>
#include <ews4800mips/ews4800mips/cons_machdep.h>
#include <dev/cons.h>
SBD_DECL(tr2a);
static const char * const tr2a_mainbusdevs[] = {
"sbdio",
#ifdef notyet
"apbus",
"vme",
#endif
NULL
};
static const struct sbdiodevdesc tr2a_sbdiodevs[] = {
{ "lance", 0x1e400000, -1, 0, 0x0000 },
{ "zsc", 0x1e440000, -1, 4, 0x0000 },
#if NEWSKBD_ZSC > 0
{ "zsc", 0x1e480000, -1, 9, 0x0001 },
#else
{ "zkbms", 0x1e480000, -1, 9, 0x0000 },
#endif
{ "mkclock", 0x1e490000, -1, -1, 0x0001 },
{ "osiop", 0x1e500000, -1, 6, 0x0001 },
{ "osiop", 0x1e510000, -1, 10, 0x0001 },
{ "fb", 0xf0000000, 0xf5f00000, -1, 0x0001 },
{ NULL, -1, -1, -1, 0x0000 }
};
static const struct sbdiodevdesc tr2a_sbdiodevs_nofb[] = {
{ "lance", 0x1e400000, -1, 0, 0x0000 },
{ "zsc", 0x1e440000, -1, 4, 0x0000 },
#if NEWSKBD_ZSC > 0
{ "zsc", 0x1e480000, -1, 9, 0x0001 },
#else
{ "zkbms", 0x1e480000, -1, 9, 0x0000 },
#endif
{ "mkclock", 0x1e490000, -1, -1, 0x0001 },
{ "osiop", 0x1e500000, -1, 6, 0x0001 },
{ "osiop", 0x1e510000, -1, 10, 0x0001 },
{ NULL, -1, -1, -1, 0x0000 }
};
void
tr2a_init(void)
{
char model_name[32];
int have_fb_sbdio;
have_fb_sbdio = 0;
platform.machine = MACHINE_TR2A;
strlcpy(model_name, SBD_INFO->model_name, sizeof(model_name));
if (model_name[0] == '\0') {
if (SBD_INFO->model == 0x101f)
strcpy(model_name, "EWS4800/360AD");
have_fb_sbdio = 1;
}
if (strcmp(model_name, "EWS4800/360ADII") == 0) {
platform.cpu_clock = 200000000;
have_fb_sbdio = 1;
} else if (strcmp(model_name, "EWS4800/360AD") == 0) {
platform.cpu_clock = 150000000;
have_fb_sbdio = 1;
} else if (strcmp(model_name, "EWS4800/360SX") == 0) {
platform.cpu_clock = 200000000;
} else if (strcmp(model_name, "EWS4800/360EX") == 0) {
platform.cpu_clock = 200000000;
} else if (strcmp(model_name, "EWS4800/360") == 0) {
platform.cpu_clock = 133333333;
} else {
printf("UNKNOWN model %s\n", model_name);
platform.cpu_clock = 133333333;
}
curcpu()->ci_cpu_freq = platform.cpu_clock;
snprintf(platform.name, sizeof(platform.name), "%s (TR2A)", model_name);
platform.mainbusdevs = tr2a_mainbusdevs;
platform.sbdiodevs = tr2a_sbdiodevs_nofb;
if (have_fb_sbdio)
platform.sbdiodevs = tr2a_sbdiodevs;
ipl_sr_map = tr2a_ipl_sr_map;
kseg2iobufsize = 0x02000000;
_SBD_OPS_REGISTER_ALL(tr2a);
mips_locore_jumpvec.ljv_wbflush = platform.wbflush;
}
int
tr2a_ipl_bootdev(void)
{
return *NVSRAM_BOOTDEV;
}
void
tr2a_cache_config(void)
{
mips_cache_info.mci_sdcache_size = 1024 * 1024;
}
void
tr2a_wbflush(void)
{
*(volatile uint32_t *)0xbe492010;
*(volatile uint32_t *)0xbe492010;
*(volatile uint32_t *)0xbe492010;
*(volatile uint32_t *)0xbe492010;
#if 0
if (has_apbus)
*(volatile uint32_t *)0xbe806000;
#endif
}
void
tr2a_mem_init(void *kernstart, void *kernend)
{
sbd_memcluster_setup(kernstart, kernend);
#if 0
sbd_memcluster_check();
#endif
}
void
tr2a_consinit(void)
{
extern struct consdev consdev_zs_sbdio;
extern const struct cdevsw zstty_cdevsw;
extern int fb_sbdio_cnattach(uint32_t, uint32_t, int);
extern void kbd_sbdio_cnattach(uint32_t, uint32_t);
extern void ewskbd_zsc_cnattach(uint32_t, uint32_t, int);
switch (*NVSRAM_CONSTYPE) {
#if NFB_SBDIO > 0
case 0x80:
cons.type = CONS_FB_KSEG2;
if (fb_sbdio_cnattach(TR2A_GAFB_ADDR, TR2A_GAREG_ADDR, 0x0001))
break;
#if NEWSKBD_ZSC > 0
ewskbd_zsc_cnattach(TR2A_KBMS_BASE, TR2A_KBMS_BASE + 4,
4915200);
#else
#if NKBMS_SBDIO > 0
kbd_sbdio_cnattach(TR2A_KBMS_BASE, TR2A_KBMS_BASE + 4);
#endif
#endif
return;
#endif
#if NZSC_SBDIO > 0
case 0x01:
cons.type = CONS_SIO1;
zs_consaddr = (void *)(TR2A_SIO_BASE + 8);
cn_tab = &consdev_zs_sbdio;
cn_tab->cn_pri = CN_REMOTE;
cn_tab->cn_dev =
makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
(*cn_tab->cn_init)(cn_tab);
return;
case 0x02:
cons.type = CONS_SIO2;
zs_consaddr = (void *)(TR2A_SIO_BASE + 0);
cn_tab = &consdev_zs_sbdio;
cn_tab->cn_pri = CN_REMOTE;
cn_tab->cn_dev =
makedev(cdevsw_lookup_major(&zstty_cdevsw), 1);
(*cn_tab->cn_init)(cn_tab);
return;
#endif
default:
break;
}
rom_cons_init();
}
void
tr2a_reboot(void)
{
*SOFTRESET_FLAG |= 0x80000000;
*SOFTRESET_REG = 0x01;
*(uint8_t *)0xbfbffffc = 0xff;
for (;;)
;
}
void
tr2a_poweroff(void)
{
for (;;)
*POWEROFF_REG = 1;
}
void
tr2a_ether_addr(uint8_t *p)
{
int i;
for (i = 0; i < 6; i++)
p[i] = *(uint8_t *)(NVSRAM_ETHERADDR + i * 4);
}