sys/arch/hpcmips/dev/mq200subr.c

201

[MQ200_I_GCC(MQ200_GC1)] = MQ200_GCCR(MQ200_GC1),

sys/arch/hpcmips/dev/mq200subr.c

202

[MQ200_I_GCC(MQ200_GC2)] = MQ200_GCCR(MQ200_GC2),

sys/arch/hpcmips/dev/mq200subr.c

227

mq200_write2(sc, &sc->sc_regctxs[MQ200_I_GCC(MQ200_GC1)], 0);

sys/arch/hpcmips/dev/mq200subr.c

230

mq200_write2(sc, &sc->sc_regctxs[MQ200_I_GCC(MQ200_GC2)], 0);

sys/arch/hpcmips/dev/mq200subr.c

286

mq200_write2(sc, &sc->sc_regctxs[MQ200_I_GCC(MQ200_GC1)],

sys/arch/hpcmips/dev/mq200subr.c

311

mq200_write2(sc, &sc->sc_regctxs[MQ200_I_GCC(MQ200_GC2)],

sys/arch/hpcmips/dev/mq200subr.c

374

mq200_mod(sc, &sc->sc_regctxs[MQ200_I_GCC(gc)],

sys/arch/hpcmips/dev/mq200subr.c

383

mq200_off(sc, &sc->sc_regctxs[MQ200_I_GCC(gc)], MQ200_GCC_WINEN);