sys/arch/arm/marvell/armadaxp.c

594

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_ERR_MASK, 0);

sys/arch/arm/marvell/armadaxp.c

619

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_ICM, n + irqbase);

sys/arch/arm/marvell/armadaxp.c

621

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_DOORBELL_MASK,

sys/arch/arm/marvell/armadaxp.c

637

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_ISM, n + irqbase);

sys/arch/arm/marvell/armadaxp.c

664

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_CTP, ctp);

sys/arch/arm/marvell/armadaxp.c

712

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_ISM, irq);

sys/arch/arm/marvell/armadaxp.c

740

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_ERR_MASK, reg);

sys/arch/arm/marvell/armadaxp.c

753

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_ERR_MASK, reg);

sys/arch/arm/marvell/armadaxp.c

765

MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_ERR_MASK, reg);