sys/arch/evbmips/mipssim/machdep.c

232

#ifdef MIPS64

sys/arch/mips/include/cpuregs.h

156

# if (MIPS1 + MIPS3 + MIPS32 + MIPS64) == 0

sys/arch/mips/include/cpuregs.h

163

#elif (MIPS32 + MIPS64) > 0

sys/arch/mips/include/cpuregs.h

834

#if (MIPS3 + MIPS4 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) == 0 && MIPS1 != 0

sys/arch/mips/include/cpuregs.h

840

#if (MIPS3 + MIPS4 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) != 0 && MIPS1 == 0

sys/arch/mips/include/locore.h

170

#if ((MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) == 1) || defined(_LOCORE)

sys/arch/mips/include/locore.h

256

#elif defined(MIPS64)

sys/arch/mips/include/locore.h

69

#if (MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) == 0

sys/arch/mips/include/locore.h

76

|| defined(MIPS64) || defined(MIPS64R2)

sys/arch/mips/mips/cache.c

1058

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/cache.c

126

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/cache.c

130

#if (MIPS1 + MIPS3 + MIPS4 + MIPS32 + MIPS64 + MIPS32R2 + MIPS64R2) > 0

sys/arch/mips/mips/cache.c

201

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/cache.c

98

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/cpu_subr.c

1064

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/cpu_subr.c

1200

#if (MIPS2 + MIPS3 + MIPS4 + MIPS5 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/db_interface.c

513

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/db_interface.c

532

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/db_interface.c

635

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/db_interface.c

85

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/db_interface.c

919

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/lock_stubs_llsc.S

56

#if defined(MIPS64)

sys/arch/mips/mips/locore_mips3.S

260

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mipsX_subr.S

173

#if (MIPS3 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) != 1

sys/arch/mips/mips/mipsX_subr.S

177

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mipsX_subr.S

1783

#if defined(MIPS64_XLS) && defined(MIPS64)

sys/arch/mips/mips/mipsX_subr.S

1851

#if !defined(_LP64) && (MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mipsX_subr.S

187

#if (MIPS3 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mipsX_subr.S

255

#if defined(MIPS64)

sys/arch/mips/mips/mipsX_subr.S

282

#if defined(MIPS64)

sys/arch/mips/mips/mipsX_subr.S

507

#if (MIPS3 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_fixup.c

471

#if (MIPS3 + MIPS4 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_fixup.c

52

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_fixup.c

537

#if (MIPS3 + MIPS4 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_machdep.c

1189

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_machdep.c

1399

#if defined(MIPS64)

sys/arch/mips/mips/mips_machdep.c

1436

#if (MIPS3 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_machdep.c

1622

#if (MIPS3 + MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_machdep.c

175

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_machdep.c

196

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_machdep.c

242

#if defined(MIPS64)

sys/arch/mips/mips/mips_machdep.c

2552

#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0

sys/arch/mips/mips/mips_machdep.c

995

#if defined(MIPS64)

sys/arch/mips/mips/mips_stacktrace.c

107

#ifdef MIPS64

sys/arch/mips/mips/mips_stacktrace.c

171

#if defined(MIPS64) /* MIPS64 family (mips-III CPU) */