L4
return(z*(L1+z*(L2+z*(L3+z*(L4+z*(L5+z*(L6+z*(L7+z*L8))))))));
return(z*(L1+z*(L2+z*(L3+z*(L4+z*(L5+z*(L6+z*L7)))))));
vc(L4, 2.2222221233634724402E-1 ,8e38,3f63,af2c,39b7, -2, .E38E3839B7AF2C)
ic(L4, 2.2222198607186277597E-1, -3, 1.C71C52150BEA6)
#define L4 vccast(L4)
r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
L4 = 2.72728123808534006489e-01, /* 0x3FD17460, 0xA91D4101 */
r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
L4 = 2.7272811532e-01, /* 0x3e8ba305 */
pd_entry_t *L4cpu, *L4, *L3, *L2, *pte;
L4 = (pd_entry_t *)avail;
memset(L4, 0, PAGE_SIZE);
L4[pl4_pi(KERNTEXTOFF)] = xpmap_ptom_masked(addr) | PTE_P | PTE_W;
__USE(L4);
L4[PDIR_SLOT_PTE] = xpmap_ptom_masked((paddr_t)L4 - KERNBASE)
PDPpaddr = (u_long)L4 - KERNBASE;
pt_entry_t *L4, *L3, *L2, *L1;
L4 = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE,
if (L4 == MAP_FAILED)
if (nvmm_hva_map(mach, (uintptr_t)L4, PAGE_SIZE) == -1)
ret = nvmm_gpa_map(mach, (uintptr_t)L4, 0x3000, PAGE_SIZE,
memset(L4, 0, PAGE_SIZE);
L4[0] = PTE_P | PTE_W | 0x4000;
pt_entry_t *L4, *L3, *L2, *L1;
L4 = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE,
if (L4 == MAP_FAILED)
if (nvmm_hva_map(mach, (uintptr_t)L4, PAGE_SIZE) == -1)
ret = nvmm_gpa_map(mach, (uintptr_t)L4, 0x3000, PAGE_SIZE,
memset(L4, 0, PAGE_SIZE);
L4[0] = PTE_P | PTE_W | 0x4000;