L3
return(z*(L1+z*(L2+z*(L3+z*(L4+z*(L5+z*(L6+z*(L7+z*L8))))))));
return(z*(L1+z*(L2+z*(L3+z*(L4+z*(L5+z*(L6+z*L7)))))));
vc(L3, 2.8571428579395698188E-1 ,4924,3f92,5782,92f8, -1, .92492492F85782)
ic(L3, 2.8571428742008753154E-1, -2, 1.24924941E07B4)
#define L3 vccast(L3)
r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
L3 = 3.33333329818377432918e-01, /* 0x3FD55555, 0x518F264D */
r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
L3 = 3.3333334327e-01, /* 0x3eaaaaab */
pd_entry_t *L4cpu, *L4, *L3, *L2, *pte;
L3 = (pd_entry_t *)avail;
memset(L3, 0, PAGE_SIZE);
addr = ((u_long)L3) - KERNBASE;
L3[pl3_pi(KERNTEXTOFF)] = xpmap_ptom_masked(addr) | PTE_P | PTE_W;
L3 = (pd_entry_t *)avail;
memset(L3, 0, PAGE_SIZE);
L3[i] = xpmap_ptom_masked(addr) | PTE_P;
L3[3] = xpmap_ptom_masked(addr) | PTE_P;
xen_bt_set_readonly((vaddr_t)L3);
cpu_info_primary.ci_pae_l3_pdir = L3;
pt_entry_t *L4, *L3, *L2, *L1;
L3 = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE,
if (L3 == MAP_FAILED)
if (nvmm_hva_map(mach, (uintptr_t)L3, PAGE_SIZE) == -1)
ret = nvmm_gpa_map(mach, (uintptr_t)L3, 0x4000, PAGE_SIZE,
memset(L3, 0, PAGE_SIZE);
L3[0] = PTE_P | PTE_W | 0x5000;
pt_entry_t *L4, *L3, *L2, *L1;
L3 = mmap(NULL, PAGE_SIZE, PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE,
if (L3 == MAP_FAILED)
if (nvmm_hva_map(mach, (uintptr_t)L3, PAGE_SIZE) == -1)
ret = nvmm_gpa_map(mach, (uintptr_t)L3, 0x4000, PAGE_SIZE,
memset(L3, 0, PAGE_SIZE);
L3[0] = PTE_P | PTE_W | 0x5000;