sys/arch/acorn32/podulebus/sfas.c

254

const pt_entry_t npte = opte & ~(L2_C | L2_B);

sys/arch/arm/arm32/pmap.c

7265

pte_l2_l_cache_mode = L2_B|L2_C;

sys/arch/arm/arm32/pmap.c

7266

pte_l2_l_wc_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7270

pte_l2_s_cache_mode = L2_B|L2_C;

sys/arch/arm/arm32/pmap.c

7271

pte_l2_s_wc_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7289

pte_l2_l_cache_mode_pt = L2_B|L2_C;

sys/arch/arm/arm32/pmap.c

7290

pte_l2_s_cache_mode_pt = L2_B|L2_C;

sys/arch/arm/arm32/pmap.c

7354

pte_l2_l_wc_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7355

pte_l2_s_wc_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7376

pte_l2_l_cache_mode = L2_B | L2_C;

sys/arch/arm/arm32/pmap.c

7377

pte_l2_s_cache_mode = L2_B | L2_C;

sys/arch/arm/arm32/pmap.c

7380

pte_l2_l_cache_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7381

pte_l2_s_cache_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7406

pte_l2_l_wc_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7407

pte_l2_s_wc_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7429

pte_l2_l_cache_mode_pt = L2_B|L2_C;

sys/arch/arm/arm32/pmap.c

7430

pte_l2_s_cache_mode_pt = L2_B|L2_C;

sys/arch/arm/arm32/pmap.c

7451

pte_l2_l_cache_mode = L2_B|L2_C;

sys/arch/arm/arm32/pmap.c

7452

pte_l2_l_wc_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7455

pte_l2_s_cache_mode = L2_B|L2_C;

sys/arch/arm/arm32/pmap.c

7456

pte_l2_s_wc_mode = L2_B;

sys/arch/arm/arm32/pmap.c

7638

l2pte_set(ptep, opte & ~L2_B, opte);

sys/arch/arm/arm32/pmap.c

7667

pte_l2_l_cache_mode = L2_C | L2_B | L2_V6_L_TEX(0x01);

sys/arch/arm/arm32/pmap.c

7669

pte_l2_s_cache_mode = L2_C | L2_B | L2_V6_XS_TEX(0x01);

sys/arch/arm/arm32/pmap.c

7672

pte_l2_s_cache_mode = L2_C | L2_B;

sys/arch/arm/arm32/pmap.c

7678

pte_l2_l_cache_mode_pt = L2_C | L2_B | L2_V6_L_TEX(0x01);

sys/arch/arm/arm32/pmap.c

7680

pte_l2_s_cache_mode_pt = L2_C | L2_B | L2_V6_XS_TEX(0x01);

sys/arch/arm/arm32/pmap.c

7682

pte_l2_s_cache_mode_pt = L2_C | L2_B;

sys/arch/arm/include/arm32/pmap.h

634

(L2_B | L2_C | L2_XS_T_TEX(TEX_XSCALE_X)))\

sys/arch/arm/include/arm32/pmap.h

875

#define L2_L_CACHE_MASK_generic (L2_B|L2_C)

sys/arch/arm/include/arm32/pmap.h

876

#define L2_L_CACHE_MASK_xscale (L2_B|L2_C|L2_XS_L_TEX(TEX_XSCALE_X))

sys/arch/arm/include/arm32/pmap.h

877

#define L2_L_CACHE_MASK_armv6 (L2_B|L2_C|L2_V6_L_TEX(TEX_ARMV6_TEX))

sys/arch/arm/include/arm32/pmap.h

878

#define L2_L_CACHE_MASK_armv6n (L2_B|L2_C|L2_V6_L_TEX(TEX_ARMV6_TEX)|L2_XS_S)

sys/arch/arm/include/arm32/pmap.h

879

#define L2_L_CACHE_MASK_armv7 (L2_B|L2_C|L2_V6_L_TEX(TEX_ARMV6_TEX)|L2_XS_S)

sys/arch/arm/include/arm32/pmap.h

901

#define L2_S_CACHE_MASK_generic (L2_B|L2_C)

sys/arch/arm/include/arm32/pmap.h

902

#define L2_S_CACHE_MASK_xscale (L2_B|L2_C|L2_XS_T_TEX(TEX_XSCALE_X))

sys/arch/arm/include/arm32/pmap.h

903

#define L2_XS_CACHE_MASK_armv6 (L2_B|L2_C|L2_V6_XS_TEX(TEX_ARMV6_TEX))

sys/arch/arm/include/arm32/pmap.h

909

#define L2_S_CACHE_MASK_armv6n (L2_B|L2_C|L2_V6_XS_TEX(TEX_ARMV6_TEX)|L2_XS_S)

sys/arch/arm/include/arm32/pmap.h

910

#define L2_S_CACHE_MASK_armv7 (L2_B|L2_C|L2_V6_XS_TEX(TEX_ARMV6_TEX)|L2_XS_S)

sys/arch/shark/ofw/chipsfb_ofbus.c

114

chipsfb_mem_vaddr = ofw_map(chipsfb_mem_paddr, 0x00200000, L2_B);

sys/arch/shark/ofw/igsfb_ofbus.c

118

igsfb_mem_vaddr = ofw_map(igsfb_mem_paddr, 0x00400000, L2_B);

sys/arch/shark/shark/shark_machdep.c

256

L2_B | L2_C);