sys/arch/arm/cortex/gic.c

576

uint32_t sgir = __SHIFTIN(ARMGIC_SGI_IPIBASE + ipi, GICD_SGIR_SGIINTID);

sys/arch/arm/cortex/gic.c

62

__CTASSERT(ARMGIC_SGI_IPIBASE + NIPI <= 8);

sys/arch/arm/cortex/gic.c

718

intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_AST, IPL_VM,

sys/arch/arm/cortex/gic.c

720

intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_XCALL, IPL_HIGH,

sys/arch/arm/cortex/gic.c

722

intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_GENERIC, IPL_HIGH,

sys/arch/arm/cortex/gic.c

724

intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_NOP, IPL_VM,

sys/arch/arm/cortex/gic.c

726

intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_SHOOTDOWN, IPL_SCHED,

sys/arch/arm/cortex/gic.c

729

intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_DDB, IPL_HIGH,

sys/arch/arm/cortex/gic.c

733

intr_establish_xname(ARMGIC_SGI_IPIBASE + IPI_KPREEMPT, IPL_VM,