Symbol: JZ_TC_TECR
sys/arch/evbmips/ingenic/clock.c
99
writereg(JZ_TC_TECR, TESR_TCST5); /* disable timer 5 */
sys/arch/evbmips/ingenic/machdep.c
113
writereg(JZ_TC_TECR, TESR_OST);