sys/arch/mips/ingenic/apbus.c

85

{ "jzgpio", JZ_GPIO_A_BASE, 17, 0, 0, 0},

sys/arch/mips/ingenic/ingenic_regs.h

402

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);

sys/arch/mips/ingenic/ingenic_regs.h

413

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);

sys/arch/mips/ingenic/ingenic_regs.h

423

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);

sys/arch/mips/ingenic/ingenic_regs.h

435

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);

sys/arch/mips/ingenic/ingenic_regs.h

447

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);

sys/arch/mips/ingenic/ingenic_regs.h

459

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);

sys/arch/mips/ingenic/ingenic_regs.h

471

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);

sys/arch/mips/ingenic/ingenic_regs.h

485

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);

sys/arch/mips/ingenic/ingenic_regs.h

499

uint32_t reg = JZ_GPIO_A_BASE + (g << 8);