sys/arch/riscv/starfive/jh7100_clkc.c

312

JH71X0CLKC_INV(JH7100_CLK_SDIO0_CCLKINT_INV, "sdio0_cclkint_inv", "sdio0_cclkint"),

sys/arch/riscv/starfive/jh7100_clkc.c

313

JH71X0CLKC_INV(JH7100_CLK_SDIO1_CCLKINT_INV, "sdio1_cclkint_inv", "sdio1_cclkint"),

sys/arch/riscv/starfive/jh7100_clkc.c

314

JH71X0CLKC_INV(JH7100_CLK_GMAC_RX_INV, "gmac_rx_inv", "gmac_rx_pre"),

sys/arch/riscv/starfive/jh7100_clkc.c

315

JH71X0CLKC_INV(JH7100_CLK_GMAC_TX_INV, "gmac_tx_inv", "gmac_tx"),

sys/arch/riscv/starfive/jh7100_clkc.c

376

JH71X0CLKC_INV(JH7100_AUDCLK_I2SADC_BCLK_N, "i2sadc_bclk_n", "i2sadc_bclk"),

sys/arch/riscv/starfive/jh7100_clkc.c

387

JH71X0CLKC_INV(JH7100_AUDCLK_I2SDAC_BCLK_N, "i2sdac_bclk_n", "i2sdac_bclk"),

sys/arch/riscv/starfive/jh7100_clkc.c

391

JH71X0CLKC_INV(JH7100_AUDCLK_I2S1_BCLK_N, "i2s1_bclk_n", "i2s1_bclk"),

sys/arch/riscv/starfive/jh7110_clkc.c

553

JH71X0CLKC_INV(JH7110_SYSCLK_GMAC1_RX_INV, "gmac1_rx_inv", "gmac1_rx"),

sys/arch/riscv/starfive/jh7110_clkc.c

555

JH71X0CLKC_INV(JH7110_SYSCLK_GMAC1_TX_INV, "gmac1_tx_inv", "gmac1_tx"),

sys/arch/riscv/starfive/jh7110_clkc.c

626

JH71X0CLKC_INV(JH7110_SYSCLK_I2STX0_BCLK_MST_INV, "i2stx0_bclk_mst_inv", "i2stx0_bclk_mst"),

sys/arch/riscv/starfive/jh7110_clkc.c

631

JH71X0CLKC_INV(JH7110_SYSCLK_I2STX0_BCLK_INV, "i2stx0_bclk_inv", "i2stx0_bclk"),

sys/arch/riscv/starfive/jh7110_clkc.c

636

JH71X0CLKC_INV(JH7110_SYSCLK_I2STX1_BCLK_MST_INV, "i2stx1_bclk_mst_inv", "i2stx1_bclk_mst"),

sys/arch/riscv/starfive/jh7110_clkc.c

641

JH71X0CLKC_INV(JH7110_SYSCLK_I2STX1_BCLK_INV, "i2stx1_bclk_inv", "i2stx1_bclk"),

sys/arch/riscv/starfive/jh7110_clkc.c

646

JH71X0CLKC_INV(JH7110_SYSCLK_I2SRX_BCLK_MST_INV, "i2srx_bclk_mst_inv", "i2srx_bclk_mst"),

sys/arch/riscv/starfive/jh7110_clkc.c

651

JH71X0CLKC_INV(JH7110_SYSCLK_I2SRX_BCLK_INV, "i2srx_bclk_inv", "i2srx_bclk"),

sys/arch/riscv/starfive/jh7110_clkc.c

661

JH71X0CLKC_INV(JH7110_SYSCLK_TDM_TDM_INV, "tdm_tdm_inv", "tdm_tdm"),

sys/arch/riscv/starfive/jh7110_clkc.c

691

JH71X0CLKC_INV(JH7110_AONCLK_GMAC0_TX_INV, "gmac0_tx_inv", "gmac0_tx"),

sys/arch/riscv/starfive/jh7110_clkc.c

693

JH71X0CLKC_INV(JH7110_AONCLK_GMAC0_RX_INV, "gmac0_rx_inv", "gmac0_rx"),

sys/arch/riscv/starfive/jh7110_clkc.c

756

JH71X0CLKC_INV(JH7110_ISPCLK_DVP_INV, "dvp_inv", "dvp_clk"),