sys/arch/mips/atheros/ar7100.c

132

REGVAL(ARCHIP_DDR_BASE + AR7100_PCI_WINDOW_0) = 0x10000000;

sys/arch/mips/atheros/ar7100.c

133

REGVAL(ARCHIP_DDR_BASE + AR7100_PCI_WINDOW_1) = 0x11000000;

sys/arch/mips/atheros/ar7100.c

134

REGVAL(ARCHIP_DDR_BASE + AR7100_PCI_WINDOW_2) = 0x12000000;

sys/arch/mips/atheros/ar7100.c

135

REGVAL(ARCHIP_DDR_BASE + AR7100_PCI_WINDOW_3) = 0x13000000;

sys/arch/mips/atheros/ar7100.c

136

REGVAL(ARCHIP_DDR_BASE + AR7100_PCI_WINDOW_4) = 0x14000000;

sys/arch/mips/atheros/ar7100.c

137

REGVAL(ARCHIP_DDR_BASE + AR7100_PCI_WINDOW_5) = 0x15000000;

sys/arch/mips/atheros/ar7100.c

138

REGVAL(ARCHIP_DDR_BASE + AR7100_PCI_WINDOW_6) = 0x16000000;

sys/arch/mips/atheros/ar7100.c

139

REGVAL(ARCHIP_DDR_BASE + AR7100_PCI_WINDOW_7) = 0x07000000;

sys/arch/mips/atheros/include/ar9344reg.h

351

#define GETDDRREG(x) REGVAL((x) + ARCHIP_DDR_BASE)

sys/arch/mips/atheros/include/ar9344reg.h

352

#define PUTDDRREG(x,v) (REGVAL((x) + ARCHIP_DDR_BASE)) = (v)