IREG_CLOCK_ENAB_5
#define IREG_CLK_BITS (IREG_CLOCK_ENAB_7 | IREG_CLOCK_ENAB_5)
#define IREG_CLK_BITS (IREG_CLOCK_ENAB_7 | IREG_CLOCK_ENAB_5)
set_clk_mode(IREG_CLOCK_ENAB_5, 0, 1);
single_inst_bclr_b(*interrupt_reg, IREG_CLOCK_ENAB_5);
single_inst_bset_b(*interrupt_reg, IREG_CLOCK_ENAB_5);
set_clk_mode(0, IREG_CLOCK_ENAB_5, 0);
set_clk_mode(IREG_CLOCK_ENAB_5, 0, 1);
#define IREG_CLK_BITS (IREG_CLOCK_ENAB_7 | IREG_CLOCK_ENAB_5)
set_clk_mode(IREG_CLOCK_ENAB_5, 0, 1);
single_inst_bclr_b(*interrupt_reg, IREG_CLOCK_ENAB_5);
single_inst_bset_b(*interrupt_reg, IREG_CLOCK_ENAB_5);