sys/arch/alpha/tc/ioasic.c

294

bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);

sys/arch/alpha/tc/ioasic.c

316

IOASIC_INTR, sir);

sys/arch/alpha/tc/tc_3000_300.c

239

(DEC_3000_300_IOASIC_ADDR + IOASIC_INTR);

sys/arch/pmax/pmax/dec_3maxplus.c

175

*(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;

sys/arch/pmax/pmax/dec_3maxplus.c

204

*(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;

sys/arch/pmax/pmax/dec_3maxplus.c

299

intr = *(uint32_t *)(ioasic_base + IOASIC_INTR);

sys/arch/pmax/pmax/dec_3maxplus.c

341

*(uint32_t *)(ioasic_base + IOASIC_INTR) = intr &~ xxxintr;

sys/arch/pmax/pmax/dec_3min.c

170

*(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;

sys/arch/pmax/pmax/dec_3min.c

203

*(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;

sys/arch/pmax/pmax/dec_3min.c

334

intr = *(volatile uint32_t *)(ioasic_base + IOASIC_INTR);

sys/arch/pmax/pmax/dec_3min.c

352

*(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = ~turnoff;

sys/arch/pmax/pmax/dec_maxine.c

168

*(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;

sys/arch/pmax/pmax/dec_maxine.c

189

*(volatile uint32_t *)(ioasic_base + IOASIC_INTR) = 0;

sys/arch/pmax/pmax/dec_maxine.c

294

intr = *(uint32_t *)(ioasic_base + IOASIC_INTR);

sys/arch/pmax/pmax/dec_maxine.c

331

*(uint32_t *)(ioasic_base + IOASIC_INTR)

sys/arch/pmax/pmax/kmin.h

182

#define KMIN_REG_INTR ( KMIN_SYS_ASIC + IOASIC_INTR )

sys/arch/pmax/pmax/kn03.h

141

#define KN03_REG_INTR ( KN03_SYS_ASIC + IOASIC_INTR )

sys/arch/pmax/pmax/maxine.h

189

#define XINE_REG_INTR ( XINE_SYS_ASIC + IOASIC_INTR )

sys/arch/pmax/tc/asc_ioasic.c

326

intr = bus_space_read_4(asc->sc_bst, asc->sc_bsh, IOASIC_INTR);

sys/arch/pmax/tc/asc_ioasic.c

329

bus_space_write_4(asc->sc_bst, asc->sc_bsh, IOASIC_INTR, intr);

sys/dev/tc/bba.c

557

mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);

sys/dev/tc/xcfb.c

523

intr = (uint32_t *)((char *)sc->sc_ri->ri_hw + IOASIC_INTR);