sys/arch/arm/nvidia/tegra_apbdma.c

163

APBDMA_WRITE(sc, APBDMACHAN_CSR_REG(n), 0);

sys/arch/arm/nvidia/tegra_apbdma.c

166

APBDMA_WRITE(sc, APBDMA_IRQ_MASK_REG, 0);

sys/arch/arm/nvidia/tegra_apbdma.c

169

APBDMA_WRITE(sc, APBDMA_COMMAND_REG, APBDMA_COMMAND_GEN);

sys/arch/arm/nvidia/tegra_apbdma.c

183

APBDMA_WRITE(sc, APBDMACHAN_STA_REG(n), sta); /* clear EOC */

sys/arch/arm/nvidia/tegra_apbdma.c

235

APBDMA_WRITE(sc, APBDMA_IRQ_MASK_SET_REG, __BIT(n));

sys/arch/arm/nvidia/tegra_apbdma.c

249

APBDMA_WRITE(sc, APBDMACHAN_CSR_REG(n), 0);

sys/arch/arm/nvidia/tegra_apbdma.c

252

APBDMA_WRITE(sc, APBDMA_IRQ_MASK_CLR_REG, __BIT(n));

sys/arch/arm/nvidia/tegra_apbdma.c

473

APBDMA_WRITE(sc, APBDMACHAN_AHB_PTR_REG(n), req->dreq_segs[0].ds_addr);

sys/arch/arm/nvidia/tegra_apbdma.c

474

APBDMA_WRITE(sc, APBDMACHAN_APB_PTR_REG(n), req->dreq_dev_phys);

sys/arch/arm/nvidia/tegra_apbdma.c

475

APBDMA_WRITE(sc, APBDMACHAN_AHB_SEQ_REG(n), ahb_seq);

sys/arch/arm/nvidia/tegra_apbdma.c

476

APBDMA_WRITE(sc, APBDMACHAN_APB_SEQ_REG(n), apb_seq);

sys/arch/arm/nvidia/tegra_apbdma.c

477

APBDMA_WRITE(sc, APBDMACHAN_WCOUNT_REG(n), req->dreq_segs[0].ds_len);

sys/arch/arm/nvidia/tegra_apbdma.c

478

APBDMA_WRITE(sc, APBDMACHAN_CSRE_REG(n), csre);

sys/arch/arm/nvidia/tegra_apbdma.c

479

APBDMA_WRITE(sc, APBDMACHAN_CSR_REG(n), csr | APBDMACHAN_CSR_ENB);

sys/arch/arm/nvidia/tegra_apbdma.c

494

APBDMA_WRITE(sc, APBDMACHAN_CSR_REG(n), v);