sys/arch/arm/sunxi/sun50i_a64_r_ccu.c

61

SUNXI_CCU_RESET(A64_R_RST_APB0_IR, APB0_RESET_REG, 1),

sys/arch/arm/sunxi/sun50i_a64_r_ccu.c

62

SUNXI_CCU_RESET(A64_R_RST_APB0_TIMER, APB0_RESET_REG, 2),

sys/arch/arm/sunxi/sun50i_a64_r_ccu.c

63

SUNXI_CCU_RESET(A64_R_RST_APB0_RSB, APB0_RESET_REG, 3),

sys/arch/arm/sunxi/sun50i_a64_r_ccu.c

64

SUNXI_CCU_RESET(A64_R_RST_APB0_UART, APB0_RESET_REG, 4),

sys/arch/arm/sunxi/sun50i_a64_r_ccu.c

65

SUNXI_CCU_RESET(A64_R_RST_APB0_I2C, APB0_RESET_REG, 6),

sys/arch/arm/sunxi/sun8i_h3_r_ccu.c

60

SUNXI_CCU_RESET(H3_R_RST_APB0_IR, APB0_RESET_REG, 1),

sys/arch/arm/sunxi/sun8i_h3_r_ccu.c

61

SUNXI_CCU_RESET(H3_R_RST_APB0_TIMER, APB0_RESET_REG, 2),

sys/arch/arm/sunxi/sun8i_h3_r_ccu.c

62

SUNXI_CCU_RESET(H3_R_RST_APB0_UART, APB0_RESET_REG, 4),

sys/arch/arm/sunxi/sun8i_h3_r_ccu.c

63

SUNXI_CCU_RESET(H3_R_RST_APB0_I2C, APB0_RESET_REG, 6),