ICP_MPR_IC
bus_space_write_4(dpmemt, dpmemh, ICP_MPR_IC, ICP_MPR_MAGIC);
if (bus_space_read_4(dpmemt, dpmemh, ICP_MPR_IC) !=
bus_space_write_1(dpmemt, dpmemh, ICP_MPR_IC + ICP_S_STATUS,
bus_space_write_1(dpmemt, dpmemh, ICP_MPR_IC + ICP_CMD_INDEX,
bus_space_write_4(dpmemt, dpmemh, ICP_MPR_IC + ICP_S_INFO,
bus_space_write_1(dpmemt, dpmemh, ICP_MPR_IC + ICP_S_CMD_INDX,
ICP_MPR_IC + ICP_S_STATUS) != 0xff) {
ICP_MPR_IC + ICP_S_INFO);
bus_space_write_1(dpmemt, dpmemh, ICP_MPR_IC + ICP_S_STATUS,
bus_space_write_4(dpmemt, dpmemh, ICP_MPR_IC + ICP_S_INFO, 0);
ICP_MPR_IC + ICP_S_INFO + sizeof(u_int32_t), 0);
ICP_MPR_IC + ICP_S_INFO + 2 * sizeof(u_int32_t), 1);
ICP_MPR_IC + ICP_S_INFO + 3 * sizeof(u_int32_t), 0);
bus_space_write_1(dpmemt, dpmemh, ICP_MPR_IC + ICP_S_CMD_INDX,
ICP_MPR_IC + ICP_S_STATUS) != 0xfe) {
bus_space_write_1(dpmemt, dpmemh, ICP_MPR_IC + ICP_S_STATUS,
ICP_MPR_IC + ICP_COMM_QUEUE + 0 * ICP_COMM_Q_SZ + ICP_OFFSET,
ICP_MPR_IC + ICP_COMM_QUEUE + 0 * ICP_COMM_Q_SZ + ICP_SERV_ID,
ICP_MPR_IC + ICP_DPR_CMD, (u_int32_t *)&ic->ic_cmd,