IBM561_CMD
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0x00);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0xff);
ibm561_regcont(data, IBM561_CMD, 0x04);
ibm561_regcont(data, IBM561_CMD, 0x0c);
ibm561_regcont(data, IBM561_CMD, val);
agten_write_dac(sc, IBM561_CMD, (tmp >> 8) & 0xff);
agten_write_dac(sc, IBM561_CMD, tmp & 0xff);
agten_write_dac(sc, IBM561_CMD, CR3_SERIAL_CLK_CTRL | CR3_RGB);
agten_write_dac(sc, IBM561_CMD, CR1_MODE_4_1_BASIC | CR1_OVL_8BPP |
agten_write_dac(sc, IBM561_CMD, CR2_ENABLE_CLC | CR2_PLL_REF_SELECT |
agten_write_dac(sc, IBM561_CMD, flag ? reg | CR2_ENABLE_RGB_OUTPUT :
agten_write_dac(sc, IBM561_CMD, x & 0xff);
agten_write_dac(sc, IBM561_CMD, (x >> 8) & 0xff);
agten_write_dac(sc, IBM561_CMD, y & 0xff);
agten_write_dac(sc, IBM561_CMD, (y >> 8) & 0xff);
agten_write_dac(sc, IBM561_CMD, cur->enable ?
agten_write_dac(sc, IBM561_CMD, cur->hot.x);
agten_write_dac(sc, IBM561_CMD, cur->hot.y);
agten_write_dac(sc, IBM561_CMD, (tmp >> 8) & 0xff);
agten_write_dac(sc, IBM561_CMD, tmp & 0xff);
agten_write_dac(sc, IBM561_CMD, cur->enable ?
agten_write_dac(sc, IBM561_CMD, cur->hot.x);
agten_write_dac(sc, IBM561_CMD, cur->hot.y);