Symbol: ANA_CFG1_ENP2S
sys/arch/arm/sunxi/sunxi_hdmiphy.c
234
PHY_SET_CLEAR(sc, ANA_CFG1, __SHIFTIN(0x7, ANA_CFG1_ENP2S), ANA_CFG1_ENP2S);
sys/arch/arm/sunxi/sunxi_hdmiphy.c
249
PHY_SET_CLEAR(sc, ANA_CFG1, __SHIFTIN(0xf, ANA_CFG1_ENP2S), ANA_CFG1_ENP2S);